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CJ
2004
93views more  CJ 2004»
15 years 1 months ago
An Architecture for Kernel-Level Verification of Executables at Run Time
Digital signatures have been proposed by several researchers as a way of preventing execution of malicious code. In this paper we propose a general architecture for performing the...
Luigi Catuogno, Ivan Visconti
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
15 years 7 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
15 years 10 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
PODS
2002
ACM
168views Database» more  PODS 2002»
16 years 1 months ago
Conjunctive Selection Conditions in Main Memory
We consider the fundamental operation of applying a conjunction of selection conditions to a set of records. With large main memories available cheaply, systems may choose to keep...
Kenneth A. Ross
IJCNN
2006
IEEE
15 years 7 months ago
Constraints on the Design Process for Systems with Human Level Intelligence
—Any system which must learn to perform a large number of behavioral features with limited information handling resources will tend to be constrained within a set of architectura...
L. Andrew Coward