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115
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LCPC
2004
Springer
15 years 7 months ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
126
Voted
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
15 years 10 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
IV
1998
IEEE
114views Visualization» more  IV 1998»
15 years 6 months ago
Level of Data - A Concept for Knowledge Discovery in Information Spaces
alization of large volumes of abstract information requires mechanisms to support the user by knowledge discovering. Therefore we developed the level of data Therein the abstract ...
Miriam Lux
ICSOC
2007
Springer
15 years 8 months ago
Negotiation of Service Level Agreements: An Architecture and a Search-Based Approach
Software systems built by composing existing services are more and more capturing the interest of researchers and practitioners. The envisaged long term scenario is that services, ...
Elisabetta Di Nitto, Massimiliano Di Penta, Alessi...
IFE
2010
161views more  IFE 2010»
15 years 8 days ago
Adaptive estimation and prediction of power and performance in high performance computing
Power consumption has become an increasingly important constraint in high-performancecomputing systems, shifting the focus from peak performance towards improving power efficiency...
Reza Zamani, Ahmad Afsahi