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MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 6 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
15 years 7 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 5 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
HCW
1999
IEEE
15 years 6 months ago
An On-Line Performance Visualization Technology
We present a new software technology for on-line performance analysis and visualization of complex parallel and distributed systems. Often heterogeneous, these systems need capabi...
Aleksandar M. Bakic, Matt W. Mutka, Diane T. Rover
WCRE
2003
IEEE
15 years 7 months ago
Moving Towards Quality Attribute Driven Software Architecture Reconstruction
There are many good reasons why organizations should perform software architecture reconstructions. However, few organizations are willing to pay for the effort. Software architec...
Christoph Stoermer, Liam O'Brien, Chris Verhoef