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DSN
2004
IEEE
15 years 1 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
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IEEESCC
2009
IEEE
15 years 4 months ago
A Service Oriented Architecture for Personalized Rich Media Delivery
Multimedia streaming means delivering continuous data to a plethora of client devices. Besides the actual data transport this also needs a high degree of content adaptation respec...
Sascha Tönnies, Benjamin Köhncke, Patric...
IPPS
2006
IEEE
15 years 3 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 3 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
ICPR
2008
IEEE
15 years 10 months ago
Recognition of books by verification and retraining
The problem of character recognition in a book should be formulated significantly different from that of a single page or word. An ideal approach to design such a recognizer is to...
C. V. Jawahar, N. V. Neeba