12 search results - page 1 / 3 » ACM: An Efficient Approach for Managing Shared Caches in Chi... |
126
Voted
HIPEAC
2009
Springer
15 years 4 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
112
Voted
IEEEPACT
2009
IEEE
15 years 7 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
ASPLOS
2008
ACM
15 years 2 months ago
2008
ACM
121
Voted
ASPLOS
1998
ACM
15 years 5 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
122
Voted
MICRO
2006
IEEE
15 years 20 days ago
2006
IEEE
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...