We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
We present a novel stereo vision modeling framework that generates approximate, yet physically-plausible representations of objects rather than creating accurate models that are c...
Krishnanand N. Kaipa, Josh C. Bongard, Andrew N. M...
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
—It is an important issue to reduce the power consumption of a hard disk that takes a large amount of computer system’s power. As a new trend, an NV cache is used to make a dis...
Hyotaek Shim, Jaegeuk Kim, Dawoon Jung, Jin-Soo Ki...
Recent accelerators such as GPUs achieve better cost-performance and watt-performance ratio, while the range of their application is more limited than general CPUs. Thus heterogen...