16 search results - page 2 / 4 » ATLAS: Automatic Term-level abstraction of RTL designs |
TC
2008
14 years 9 months ago
2008
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
80
Voted
RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—The generation of device drivers is a very time consuming and error prone activity. All the strategies proposed up to now to simplify this operation require a manual, ev...
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
For modern embedded systems, the complexity of embedded applications has reached a point where the performance requirements of these applications can no longer be supported by emb...