16 search results - page 3 / 4 » ATLAS: Automatic Term-level abstraction of RTL designs |
TVLSI
2008
13 years 5 months ago
2008
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
ICCAD
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— In bounded model checking (BMC)-based verification flows lack of reachability constraints often leads to false negatives. At present, it is daily practice of a veri...
MICCAI
2008
Springer
14 years 7 months ago
2008
Springer
Abstract. This paper describes a framework for quantitative analysis of neuroimaging data of traveling human phantoms used for cross-site validation. We focus on the analysis of ma...
CODES
2008
IEEE
14 years 21 days ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...