Modern challenges led to a design of a wide range of programming models for reactive, parallel and concurrent programming, but these are often t to encode in general purpose langua...
Abstract— In this paper the robust behavior in some piecewise affine systems with minimally spaced transition times is studied. Such systems are found e.g. in satellites and sat...
Alexandre R. Mesquita, Karl Heinz Kienitz, Erico L...
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...