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» Abstract Simulators for the DSDE Formalism
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DSD
2010
IEEE
140views Hardware» more  DSD 2010»
14 years 11 months ago
RobuCheck: A Robustness Checker for Digital Circuits
Abstract—Continuously shrinking feature sizes cause an increasing vulnerability of digital circuits. Manufacturing failures and transient faults may tamper the functionality. Aut...
Stefan Frehse, Görschwin Fey, André S&...
DNA
2009
Springer
145views Bioinformatics» more  DNA 2009»
15 years 6 months ago
Distributed Agreement in Tile Self-assembly
Abstract. Laboratory investigations have shown that a formal theory of fault-tolerance will be essential to harness nanoscale self-assembly as a medium of computation. Several rese...
Aaron Sterling
UML
2005
Springer
15 years 4 months ago
Specifying Precise Use Cases with Use Case Charts
Use cases are a popular method for capturing and structuring software requirements. The informality of use cases is both a blessing and a curse. It enables easy application and lea...
Jon Whittle
FMCAD
2009
Springer
15 years 6 months ago
Assume-guarantee validation for STE properties within an SVA environment
Abstract—Symbolic Trajectory Evaluation is an industrialstrength verification method, based on symbolic simulation and abstraction, that has been highly successful in data path ...
Zurab Khasidashvili, Gavriel Gavrielov, Tom Melham
ICCAD
2008
IEEE
151views Hardware» more  ICCAD 2008»
15 years 8 months ago
Race analysis for SystemC using model checking
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
Nicolas Blanc, Daniel Kroening