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ETS
2007
IEEE
105views Hardware» more  ETS 2007»
15 years 10 months ago
Communication-Centric SoC Debug Using Transactions
— The growth in System-on-Chip complexity puts pressure on system verification. Due to limitations in the pre-silicon verification process, errors in hardware and software slip...
Bart Vermeulen, Kees Goossens, Remco van Steeden, ...
INFOCOM
2010
IEEE
15 years 2 months ago
Overcoming Failures: Fault-tolerance and Logical Centralization in Clean-Slate Network Management
—We investigate the design of a clean-slate control and nt plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of logically c...
Hammad Iqbal, Taieb Znati
COLING
1992
15 years 5 months ago
Towards Robust PATR
We report on the initial stages of development of a robust parsing system, to be used as part of The Editor's Assistant, a program that detects and corrects textual errors an...
Shona Douglas, Robert Dale
EMSOFT
2001
Springer
15 years 8 months ago
Some Synchronization Issues When Designing Embedded Systems from Components
Abstract This paper is sort of a confession. Issues of synchrony, asynchrony, and synchronization, arise frequently in designing embedded systems from components, like everyone I k...
Albert Benveniste
DBSEC
2010
196views Database» more  DBSEC 2010»
15 years 16 days ago
Preserving Integrity and Confidentiality of a Directed Acyclic Graph Model of Provenance
Abstract. This paper describes how to preserve integrity and confidentiality of a directed acyclic graph (DAG) model of provenance database. We show a method to preserve integrity ...
Amril Syalim, Takashi Nishide, Kouichi Sakurai