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ATS
2000
IEEE
145views Hardware» more  ATS 2000»
15 years 4 months ago
Compaction-based test generation using state and fault information
We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwa...
112
Voted
EMSOFT
2008
Springer
15 years 2 months ago
Symbolic analysis for improving simulation coverage of Simulink/Stateflow models
Aimed at verifying safety properties and improving simulation coverage for hybrid systems models of embedded control software, we propose a technique that combines numerical simul...
Rajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shash...
FORMATS
2003
Springer
15 years 5 months ago
Time-Optimal Test Cases for Real-Time Systems
Testing is the primary software validation technique used by industry today, but remains ad hoc, error prone, and very expensive. A promising improvement is to automatically genera...
Anders Hessel, Kim Guldstrand Larsen, Brian Nielse...
95
Voted
ICTAI
2002
IEEE
15 years 5 months ago
A Genetic Testing Framework for Digital Integrated Circuits
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
Xiaoming Yu, Alessandro Fin, Franco Fummi, Elizabe...
UML
2004
Springer
15 years 5 months ago
The AGEDIS Tools for Model Based Testing
We describe the tools and interfaces created by the AGEDIS project, a European Commission sponsored project for the creation of a methodology and tools for automated model driven ...
Alan Hartman, Kenneth Nagin