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115
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JGO
2011
89views more  JGO 2011»
14 years 3 months ago
Model building using bi-level optimization
Abstract In many problems from different disciplines such as engineering, physics, medicine, and biology, a series of experimental data is used in order to generate a model that ca...
Georges K. Saharidis, Ioannis P. Androulakis, Mari...
110
Voted
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
16 years 22 days ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
96
Voted
ISCA
2007
IEEE
120views Hardware» more  ISCA 2007»
15 years 6 months ago
Examining ACE analysis reliability estimates using fault-injection
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
Nicholas J. Wang, Aqeel Mahesri, Sanjay J. Patel
HPCA
2006
IEEE
16 years 22 days ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
UML
2005
Springer
15 years 5 months ago
Specifying Precise Use Cases with Use Case Charts
Use cases are a popular method for capturing and structuring software requirements. The informality of use cases is both a blessing and a curse. It enables easy application and lea...
Jon Whittle