In today's SoC design cycles, debugging is one of the most time consuming manual tasks. CAD solutions strive to reduce the inefficiency of debugging by identifying error sourc...
Sean Safarpour, Hratch Mangassarian, Andreas G. Ve...
ion Refinement by Controllability and Cooperativeness Analysis Freddy Y.C. Mang and Pei-Hsin Ho Advanced Technology Group, Synopsys, Inc. {fmang, pho}@synopsys.com nt a new abstrac...
Equivalence checking and property checking are powerful techniques to detect error traces. Debugging these traces is a time consuming design task where automation provides help. I...
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
In a paper [1] presented to BICS 2006, a basic methodology for microprocessor design automation using DNA sequences was proposed. A refined methodology with new schemes for travers...