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DAC
2002
ACM
15 years 10 months ago
Transformation based communication and clock domain refinement for system design
The ForSyDe methodology has been developed for system level design. In this paper we present formal transformation methods for the refinement of an abstract and formal system mode...
Ingo Sander, Axel Jantsch
ASPDAC
1998
ACM
105views Hardware» more  ASPDAC 1998»
15 years 1 months ago
Techniques for Functional Test Pattern Execution
Functional debugging often dominates the time and cost of the ASIC system development, mainly due to the limited controllability and observability of the storage elements in desig...
Inki Hong, Miodrag Potkonjak
FASE
2004
Springer
15 years 2 months ago
Consistent Adaptation and Evolution of Class Diagrams during Refinement
Abstract. Software models are key in separating and solving independent development concerns. However, there is still a gap on how to transition design information among these sepa...
Alexander Egyed
DAC
2004
ACM
15 years 10 months ago
Automatic generation of breakpoint hardware for silicon debug
Scan-based silicon debug is a technique that can be used to help find design errors in prototype silicon more quickly. One part of this technique involves the inclusion of breakpo...
Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep...
TCAD
2010
136views more  TCAD 2010»
14 years 4 months ago
Bounded Model Debugging
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...
Brian Keng, Sean Safarpour, Andreas G. Veneris