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FORMATS
2008
Springer
14 years 11 months ago
Formal Modeling and Scheduling of Datapaths of Digital Document Printers
Abstract. We apply three different modeling frameworks -- timed automata (Uppaal), colored Petri nets and synchronous data flow -- to model a challenging industrial case study that...
Georgeta Igna, Venkatesh Kannan, Yang Yang, Twan B...
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
15 years 2 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
CC
1998
Springer
134views System Software» more  CC 1998»
15 years 2 months ago
Flow Logics for Constraint Based Analysis
Abstract. Flow logic offers a compact and versatile notation for expressing the acceptability of solutions to program analysis problems. In contrast to previous logical formulation...
Hanne Riis Nielson, Flemming Nielson
DAC
2003
ACM
15 years 11 months ago
Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system
This paper describes a case study and design flow of a secure embedded system called ThumbPod, which uses cryptographic and biometric signal processing acceleration. It presents t...
David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazu...
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
15 years 4 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos