Sciweavers

518 search results - page 85 / 104
» Accelerated Data-Flow Analysis
Sort
View
CCECE
2006
IEEE
15 years 4 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
IPPS
2006
IEEE
15 years 4 months ago
Parallelization and performance characterization of protein 3D structure prediction of Rosetta
The prediction of protein 3D structure has become a hot research area in the post-genome era, through which people can understand a protein’s function in health and disease, exp...
Wenlong Li, Tao Wang, Eric Li, D. Baker, Li Jin, S...
IPPS
2006
IEEE
15 years 4 months ago
Automatically translating a general purpose C++ image processing library for GPUs
— This paper presents work-in-progress towards a C++ source-to-source translator that automatically seeks parallelisable code fragments and replaces them with code for a graphics...
Jay L. T. Cornwall, Olav Beckmann, Paul H. J. Kell...
ISM
2006
IEEE
112views Multimedia» more  ISM 2006»
15 years 4 months ago
Security Considerations for SOA-Based Multimedia Applications
Growing levels of digitalization and broadband access drives extremely fast progress in multimedia and networking technologies and allows consumers to create requirements at an ac...
Andrew Roczniak, Alexandre Miège, Abdulmota...
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
15 years 3 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...