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ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
15 years 1 months ago
Efficient On-Chip Communications for Data-Flow IPs
We explain a systematic way of interfacing data-flow hardware accelerators (IP) for their ion in a system on chip. We abstract the communication behaviour of the data flow IP so a...
Antoine Fraboulet, Tanguy Risset
WSC
2008
15 years 4 days ago
Modeling and simulation of integrated intelligent systems
Complex systems consist of a large number of entities with their independent local rules and goals, along with their interactions. The effect of these properties tends to produce ...
Yongchang Li, Michael Balchanos, Bassem Nairouz, N...
HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
15 years 2 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
WSC
1998
14 years 11 months ago
Architecture for a Non-deterministic Simulation Machine
Causality constraints of random discrete simulation make parallel and distributed processing difficult. Methods of applying reconfigurable logic to implement and accelerate simula...
Marc Bumble, Lee D. Coraor
WSC
1997
14 years 11 months ago
Urban Traffic Simulation with Psycho-Physical Vehicle-Following Models
A psycho-physical vehicle-following model tries to capture both the physical and human components of congested-traffic simulations. These models determine the reactions of the veh...
Thomas Schulze, Thomas Fliess