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» Accelerating multi-core simulators
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FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
15 years 3 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
ICMCS
2006
IEEE
111views Multimedia» more  ICMCS 2006»
15 years 3 months ago
Substream Allocation in Layered P2P Streaming
In layered P2P streaming system, how to allocate number of the copies for each layer is a challenging problem. In this paper, we present a substream allocation scheme in layered P...
Yifeng He, Ivan Lee, Ling Guan
ICRA
2005
IEEE
106views Robotics» more  ICRA 2005»
15 years 3 months ago
A Fast Online Gait Planning with Boundary Condition Relaxation for Humanoid Robots
— A fast online gait planning method is proposed. Based on an approximate dynamical biped model whose mass is concentrated to COG, general solution of the equation of motion is a...
Tomomichi Sugihara, Yoshihiko Nakamura
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 3 months ago
SoC design integration by using automatic interconnection rectification
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
CODES
1999
IEEE
15 years 2 months ago
Co-design tool construction using APICES
In this paper, we present our approach to automate the development process of co-design tools. We demonstrate with a non-trivial real world example how we can accelerate the tool ...
Ansgar Bredenfeld