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ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
15 years 6 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 4 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
INFOCOM
2009
IEEE
15 years 4 months ago
Packet Classification Algorithms: From Theory to Practice
—During the past decade, the packet classification problem has been widely studied to accelerate network applications such as access control, traffic engineering and intrusion de...
Yaxuan Qi, Lianghong Xu, Baohua Yang, Yibo Xue, Ju...
ICPP
2008
IEEE
15 years 4 months ago
Machine Learning Models to Predict Performance of Computer System Design Alternatives
Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive p...
Berkin Özisikyilmaz, Gokhan Memik, Alok N. Ch...
CODES
2007
IEEE
15 years 4 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...