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SASP
2009
IEEE
170views Hardware» more  SASP 2009»
15 years 7 months ago
Parade: A versatile parallel architecture for accelerating pulse train clustering
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
Amin Ansari, Dan Zhang, Scott A. Mahlke
ICCS
2009
Springer
15 years 7 months ago
Time Acceleration Methods for Advection on the Cubed Sphere
Climate simulation will not grow to the ultrascale without new algorithms to overcome the scalability barriers blocking existing implementations. Until recently, climate simulation...
R. K. Archibald, Katherine J. Evans, J. B. Drake, ...
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DATE
2008
IEEE
156views Hardware» more  DATE 2008»
15 years 7 months ago
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in ...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
FCCM
2008
IEEE
205views VLSI» more  FCCM 2008»
15 years 7 months ago
Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation
The recent turmoil in global credit markets has demonstrated the need for advanced modelling of credit risk, which can take into account the effects of changing economic condition...
David B. Thomas, Wayne Luk
FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
15 years 6 months ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...