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ICASSP
2011
IEEE
14 years 4 months ago
Real-time DVB-S2 LDPC decoding on many-core GPU accelerators
It is well known that LDPC decoding is computationally demanding and one of the hardest signal operations to parallelize. Beyond data dependencies that restrict the decoding of a ...
Gabriel Falcão Paiva Fernandes, Joao Andrad...
129
Voted
ICDM
2010
IEEE
276views Data Mining» more  ICDM 2010»
14 years 10 months ago
Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs
Many time series data mining problems require subsequence similarity search as a subroutine. While this can be performed with any distance measure, and dozens of distance measures ...
Doruk Sart, Abdullah Mueen, Walid A. Najjar, Eamon...
71
Voted
ICCD
2000
IEEE
87views Hardware» more  ICCD 2000»
15 years 9 months ago
A Register File with Transposed Access Mode
We introduce a new register file architecture that provides both row-wise and column-wise accesses, thus allowing partitioned instructions to be used in columnwise processing with...
Yoochang Jung, Stefan G. Berg, Donglok Kim, Yongmi...
113
Voted
ICPR
2008
IEEE
15 years 7 months ago
Camera motion filtering and its applications
Camera motion filtering is important in many applications, such as camera-based visual control interface on a mobile device. In this paper, we first present a robust global motion...
Jiang Gao
70
Voted
ARITH
2007
IEEE
15 years 7 months ago
Design of the ARM VFP11 Divide and Square Root Synthesisable Macrocell
This paper presents the detailed design of the ARM VFP11 Divide and Square Root synthesisable macrocell. The macrocell was designed using the minimum-redundancy radix-4 SRT digit ...
Neil Burgess, Chris N. Hinds