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GRAPHICSINTERFACE
2001
15 years 2 months ago
Accelerated Splatting using a 3D Adjacency Data Structure
We introduce a new acceleration to the standard splatting volume rendering algorithm. Our method achieves full colour (32-bit), depth-sorted and shaded volume rendering significan...
Jeff Orchard, Torsten Möller
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
15 years 10 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
15 years 10 months ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
JRTIP
2007
108views more  JRTIP 2007»
15 years 1 months ago
Real-time hardware acceleration of the trace transform
The trace transform is a novel algorithm that has been shown to be effective in a number of image recognition tasks. It is a generalisation of the Radon transform that has been wid...
Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y...
SIPS
2007
IEEE
15 years 7 months ago
Low-Overhead Run-Time Scheduling for Fine-Grained Acceleration of Signal Processing Systems
In this paper, we present four scheduling algorithms that provide flexible utilization of fine-grain DSP accelerators with low run-time overhead. Methods that have originally been...
Jani Boutellier, Shuvra S. Bhattacharyya, Olli Sil...