380 search results - page 11 / 76 » Accurate Predictive Interconnect Modeling for System-Level D... |
107
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DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computation...
ISQED
2003
IEEE
15 years 4 months ago
2003
IEEE
In this paper we propose a new design methodology targeted for core-based designs using parameterized macrocells (PMC’s). This methodology provides the flexibility for instance...
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
VLSID
2003
IEEE
16 years 16 hour ago
2003
IEEE
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
101
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TC
2008
14 years 11 months ago
2008
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...