380 search results - page 16 / 76 » Accurate Predictive Interconnect Modeling for System-Level D... |
ICCD
2006
IEEE
15 years 8 months ago
2006
IEEE
— New back-end design for manufacturability rules have brought guarantee rules for interconnect matching. These rules indicate a certain capacitance matching guarantee given spac...
IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
Although several analytical models have been proposed in the literature for different interconnection networks with different routing algorithms, there is only one work dealing wi...
86
Voted
DAC
1999
ACM
16 years 19 days ago
1999
ACM
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
VLSID
1999
IEEE
15 years 4 months ago
1999
IEEE
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...