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SLIP
2005
ACM
15 years 5 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
ICCD
2004
IEEE
120views Hardware» more  ICCD 2004»
15 years 8 months ago
XTalkDelay: A Crosstalk-Aware Timing Analysis Tool for Chip-Level Designs
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDel...
Yinghua Li, Rajeev Murgai, Takashi Miyoshi, Ashwin...
ASPLOS
2006
ACM
15 years 3 months ago
Efficiently exploring architectural design spaces via predictive modeling
Architects use cycle-by-cycle simulation to evaluate design choices and understand tradeoffs and interactions among design parameters. Efficiently exploring exponential-size desig...
Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R...
BIS
2009
154views Business» more  BIS 2009»
15 years 24 days ago
Using Process Mining to Generate Accurate and Interactive Business Process Maps
Abstract. The quality of today's digital maps is very high. This allows for new functionality as illustrated by modern car navigation systems (e.g., TomTom, Garmin, etc.), Goo...
Wil M. P. van der Aalst
EUROPAR
2007
Springer
15 years 5 months ago
A First Step Towards Automatically Building Network Representations
To fully harness Grids, users or middlewares must have some knowledge on the topology of the platform interconnection network. As such knowledge is usually not available, one must ...
Lionel Eyraud-Dubois, Arnaud Legrand, Martin Quins...