380 search results - page 39 / 76 » Accurate Predictive Interconnect Modeling for System-Level D... |
102
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DAC
2010
ACM
15 years 3 months ago
2010
ACM
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
119
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HPCA
2009
IEEE
16 years 10 days ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
BMCBI
2010
14 years 12 months ago
2010
Background: The binding of regulatory proteins to their specific DNA targets determines the accurate expression of the neighboring genes. The in silico prediction of new binding s...
SIGCOMM
2010
ACM
14 years 12 months ago
2010
ACM
RSSI is known to be a fickle indicator of whether a wireless link will work, for many reasons. This greatly complicates operation because it requires testing and adaptation to fin...
102
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TSE
2002
14 years 11 months ago
2002
A number of papers have investigated the relationships between design metrics and the detection of faults in object-oriented software. Several of these studies have shown that suc...