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ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
15 years 2 months ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay
ISQED
2010
IEEE
151views Hardware» more  ISQED 2010»
15 years 4 months ago
Leakage temperature dependency modeling in system level analysis
Abstract— As the semiconductor technology continues its marching toward the deep sub-micron domain, the strong relation between leakage current and temperature becomes critical i...
Huang Huang, Gang Quan, Jeffrey Fan
SLIP
2003
ACM
15 years 2 months ago
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
91
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TCOM
2010
106views more  TCOM 2010»
14 years 7 months ago
On the system level prediction of joint time frequency spreading systems with carrier phase noise
- Phase noise is a topic of theoretical and practical interest in electronic circuits. Although progress has been made in the characterization of its description, there are still c...
Youssef Nasser, Mathieu Des Noes, Laurent Ros, Gen...
FPL
2004
Springer
205views Hardware» more  FPL 2004»
15 years 2 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...