380 search results - page 5 / 76 » Accurate Predictive Interconnect Modeling for System-Level D... |
SLIP
2005
ACM
15 years 3 months ago
2005
ACM
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
75
Voted
ICCD
2002
IEEE
15 years 6 months ago
2002
IEEE
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....