380 search results - page 6 / 76 » Accurate Predictive Interconnect Modeling for System-Level D... |
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
78
Voted
DAC
1999
ACM
15 years 1 months ago
1999
ACM
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
ATS
2010
IEEE
14 years 4 months ago
2010
IEEE
In recent technology nodes, reliability is considered a part of the standard design flow at all levels of embedded system design. While techniques that use only low-level models at...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...