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ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
15 years 10 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
15 years 10 months ago
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis
This work is a contribution to high level synthesis for low power systems. While device feature size decreases, interconnect power becomes a dominating factor. Thus it is importan...
Ansgar Stammermann, Domenik Helms, Milan Schulte, ...
ICCAD
2001
IEEE
152views Hardware» more  ICCAD 2001»
15 years 10 months ago
Hybrid Structured Clock Network Construction
This paper hierarchically constructs a hybrid mesh/tree clock network structure consisting of overlying zero-skew clock meshes, with underlying zero-skew clock trees originating f...
Haihua Su, Sachin S. Sapatnekar
ICASSP
2009
IEEE
15 years 8 months ago
Wrapping snakes for improved lip segmentation
A key step in the process of lip-reading is determining the shape of the speaker’s lips. This has previously been achieved through an energy method known as “snakes”, howeve...
Matthew Ramage, Euan Lindsay
ICASSP
2008
IEEE
15 years 8 months ago
A two-stage approach to saliency detection in images
Researches in psychology, perception and related fields show that there may be a two-stage process involved in human vision. In this paper, we propose an approach by following a t...
Zheshen Wang, Baoxin Li