276 search results - page 11 / 56 » Accurate and Efficient Static Timing Analysis with Crosstalk |
DAC
2005
ACM
15 years 1 months ago
2005
ACM
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
ICCAD
2000
IEEE
15 years 2 months ago
2000
IEEE
ct Static timing analysis has traditionally used the PERT method for identifying the critical path of a digital circuit. Due to the influence of the slope of a signal at a particul...
DAC
2006
ACM
15 years 2 months ago
2006
ACM
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying SSTA in practice today is the lack of reliable and e...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
We present an efficient and accurate gate sizing tool that employs a novel piecewise convex delay model, handling both rise and fall delays, for static CMOS gates. The delay model...
ASPDAC
2006
ACM
15 years 5 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...