Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
We describe a new automatic static analysis for determining upper-bound functions on the use of quantitative resources for strict, higher-order, polymorphic, recursive programs de...
Steffen Jost, Hans-Wolfgang Loidl, Kevin Hammond, ...
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...
Yungseon Eo, Seongkyun Shin, William R. Eisenstadt...