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» Accurate and Efficient Static Timing Analysis with Crosstalk
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JPDC
2011
129views more  JPDC 2011»
14 years 6 months ago
Static timing analysis for modeling QoS in networks-on-chip
Networks-on-chip (NoCs) are used in a growing number of SoCs and multi-core processors. Because messages compete for the NoC’s shared resources, quality of service and resource ...
Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Is...
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
15 years 4 months ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic
DATE
2006
IEEE
129views Hardware» more  DATE 2006»
15 years 5 months ago
Non-gaussian statistical interconnect timing analysis
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
74
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DAC
2000
ACM
16 years 2 days ago
Dynamic noise analysis in precharge-evaluate circuits
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...
Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Y...
70
Voted
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
15 years 2 months ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...