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INFOCOM
2002
IEEE
15 years 11 months ago
Fair Scheduling and Buffer Management in Internet Routers
Abstract—Input buffered switch architecture has become attractive for implementing high performance routers and expanding use of the Internet sees an increasing need for quality ...
Nan Ni, Laxmi N. Bhuyan
INFOCOM
2002
IEEE
15 years 11 months ago
Topologically-Aware Overlay Construction and Server Selection
— A number of large-scale distributed Internet applications could potentially benefit from some level of knowledge about the relative proximity between its participating host no...
Sylvia Ratnasamy, Mark Handley, Richard M. Karp, S...
ISCA
2002
IEEE
159views Hardware» more  ISCA 2002»
15 years 11 months ago
Avoiding Initialization Misses to the Heap
This paper investigates a class of main memory accesses (invalid memory traffic) that can be eliminated altogether. Invalid memory traffic is real data traffic that transfers inva...
Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 11 months ago
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
André Seznec, Stephen Felix, Venkata Krishn...
SIGMOD
2010
ACM
211views Database» more  SIGMOD 2010»
15 years 11 months ago
ERACER: a database approach for statistical inference and data cleaning
Real-world databases often contain syntactic and semantic errors, in spite of integrity constraints and other safety measures incorporated into modern DBMSs. We present ERACER, an...
Chris Mayfield, Jennifer Neville, Sunil Prabhakar
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