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DAC
2007
ACM
16 years 20 days ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
TCSV
2002
119views more  TCSV 2002»
14 years 11 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...
96
Voted
WECWIS
2005
IEEE
128views ECommerce» more  WECWIS 2005»
15 years 5 months ago
Comparison of Two Distinctive Model Driven Web Service Orchestration Proposals
The concept of MDA (model driven architecture) aims at the goal of longevity (through business logic and architecture migration between different platforms) and quality improvemen...
Konrad Pfadenhauer, Burkhard Kittl, Schahram Dustd...
106
Voted
DAC
2003
ACM
16 years 19 days ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
SBCCI
2009
ACM
131views VLSI» more  SBCCI 2009»
15 years 4 months ago
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown
Because of the aggressive scaling of integrated circuits and the given limits of atomic scales, circuit designers have to become more and more aware of the arising reliability and...
Hagen Sämrow, Claas Cornelius, Frank Sill, An...