50 search results - page 8 / 10 » Achieving Far Transfer in an Integrated Cognitive Architectu... |
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
HICSS
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents RDSS, a Resource Area Network (RAN)-based Distributed Storage System, which is designed for high scalability, long-term reliability, and operational efficiency...
EUROPAR
2005
Springer
15 years 3 months ago
2005
Springer
Grid-BGC is a Grid-enabled terrestrial biogeochemical cycle simulator collaboratively developed by the National Center for Atmospheric Research (NCAR) and the University of Colorad...
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IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...