26 search results - page 4 / 6 » Active leakage power optimization for FPGAs |
ISLPED
2007
ACM
14 years 11 months ago
2007
ACM
This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors ...
102
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JCSC
2002
14 years 9 months ago
2002
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
TCSV
2008
14 years 9 months ago
2008
The objective of dynamic voltage scaling (DVS) is to adapt the frequency and voltage for configurable platforms to obtain energy savings. DVS is especially attractive for video dec...
ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
102
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ISVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...