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84
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HPCA
2009
IEEE
15 years 10 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
15 years 4 months ago
Virtual private caches
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
Kyle J. Nesbit, James Laudon, James E. Smith
72
Voted
IPPS
2006
IEEE
15 years 3 months ago
Battery-aware router scheduling in wireless mesh networks
Wireless mesh networks recently emerge as a flexible, low-cost and multipurpose networking platform with wired infrastructure connected to the Internet. A critical issue in mesh ...
Chi Ma, Zhenghao Zhang, Yuanyuan Yang
SIGCOMM
2005
ACM
15 years 3 months ago
Declarative routing: extensible routing with declarative queries
The Internet’s core routing infrastructure, while arguably robust and efficient, has proven to be difficult to evolve to accommodate the needs of new applications. Prior researc...
Boon Thau Loo, Joseph M. Hellerstein, Ion Stoica, ...
ECOOPW
1999
Springer
15 years 1 months ago
The Role of Trust Management in Distributed Systems Security
Existing authorization mechanisms fail to provide powerful and robust tools for handling security at the scale necessary for today's Internet. These mechanisms are coming unde...
Matt Blaze, Joan Feigenbaum, Angelos D. Keromytis