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150
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ICPP
2009
IEEE
15 years 2 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...
123
Voted
DASFAA
2009
IEEE
146views Database» more  DASFAA 2009»
15 years 12 months ago
In-Page Logging B-Tree for Flash Memory
We demonstrate the IPL B+ -tree prototype, which has been designed as a flash-aware index structure by adopting the in-page logging (IPL) scheme. The IPL scheme has been proposed ...
Gap-Joo Na, Bongki Moon, Sang-Won Lee
150
Voted
ISCAS
2006
IEEE
140views Hardware» more  ISCAS 2006»
15 years 11 months ago
Multilevel flash memory on-chip error correction based on trellis coded modulation
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Z...
147
Voted
DAGSTUHL
2001
15 years 6 months ago
Visualizing Memory Graphs
To understand the dynamics of a running program, it is often useful to examine its state at specific moments during its execution. We present memory graphs as a means to capture an...
Thomas Zimmermann, Andreas Zeller
128
Voted
AH
2006
Springer
15 years 8 months ago
Recomindation: New Functions for Augmented Memories
Advances in technological support for augmented personal memories make possible new ways of enhancing the process of product recommendation. Instead of simply analyzing information...
Carolin Plate, Nathalie Basselin, Alexander Kr&oum...