Sciweavers

3865 search results - page 132 / 773
» Active memory operations
Sort
View
141
Voted
DATE
2010
IEEE
147views Hardware» more  DATE 2010»
15 years 8 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
COGSCI
2002
60views more  COGSCI 2002»
15 years 6 months ago
Memory for goals: an activation-based model
Goal-directed cognition is often discussed in terms of specialized memory structures like the "goal stack." The goal-activation model presented here analyzes goal-direct...
Erik M. Altmann, J. Gregory Trafton
171
Voted
JOCN
2010
95views more  JOCN 2010»
15 years 4 months ago
Visual Short-term Memory Capacity for Simple and Complex Objects
■ Does the capacity of visual short-term memory (VSTM) depend on the complexity of the objects represented in memory? Although some previous findings indicated lower capacity fo...
Roy Luria, Paola Sessa, Alex Gotler, Pierre Jolico...
TACAS
2010
Springer
210views Algorithms» more  TACAS 2010»
16 years 1 months ago
Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
Alastair F. Donaldson, Daniel Kroening, Philipp R&...
DATE
2009
IEEE
180views Hardware» more  DATE 2009»
16 years 27 days ago
FSAF: File system aware flash translation layer for NAND Flash Memories
NAND Flash Memories require Garbage Collection (GC) and Wear Leveling (WL) operations to be carried out by Flash Translation Layers (FTLs) that oversee flash management. Owing to ...
Sai Krishna Mylavarapu, Siddharth Choudhuri, Avira...