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ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
15 years 9 months ago
A Methodology for Verifying Memory Access Protocols in Behavioral Synthesis
— Memory is one of the most important components to be optimized in the several phases of the synthesis process. ioral synthesis, a memory is viewed as an abstract construct whic...
Gernot Koch, Taewhan Kim, Reiner Genevriere
DATE
1998
IEEE
106views Hardware» more  DATE 1998»
15 years 8 months ago
March Tests for Word-Oriented Memories
Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e....
A. J. van de Goor, Issam B. S. Tlili
FUIN
2008
80views more  FUIN 2008»
15 years 4 months ago
External Memory Algorithms for String Problems
In this paper we present external memory algorithms for some string problems. External memory algorithms have been developed in many research areas, as the speed gap between fast ...
Kangho Roh, Maxime Crochemore, Costas S. Iliopoulo...
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
14 years 7 days ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
IPPS
1999
IEEE
15 years 8 months ago
Visualization and Performance Prediction of Multithreaded Solaris Programs by Tracing Kernel Threads
Efficient performance tuning of parallel programs is often hard. We present a performance prediction and visualization tool called VPPB. Based on a monitored uni-processor executi...
Magnus Broberg, Lars Lundberg, Håkan Grahn