3865 search results - page 724 / 773 » Active memory operations |
162
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PARA
1995
Springer
15 years 9 months ago
1995
Springer
This paper describes a proposal for a set of Parallel Basic Linear Algebra Subprograms PBLAS . The PBLAS are targeted at distributed vector-vector, matrix-vector and matrixmatrix...
183
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ASPLOS
2008
ACM
15 years 7 months ago
2008
ACM
Standard concurrency control mechanisms offer a trade-off: Transactional memory approaches maximize concurrency, but suffer high overheads and cost for retrying in the case of act...
175
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AUSAI
2008
Springer
15 years 7 months ago
2008
Springer
In recent years, there has been a cross-fertilization of ideas between computational neuroscience models of the operation of the neocortex and artificial intelligence models of mac...
170
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ISCA
2010
IEEE
15 years 7 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
139
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IWMM
2010
Springer
15 years 7 months ago
2010
Springer
With the current developments in CPU implementations, it becomes obvious that ever more parallel multicore systems will be used even in embedded controllers that require real-time...