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ISMVL
2010
IEEE
188views Hardware» more  ISMVL 2010»
15 years 9 months ago
MDGs Reduction Technique Based on the HOL Theorem Prover
—Multiway Decision Graphs (MDGs) subsume Binary Decision Diagrams (BDDs) and extend them by a first-order formulae suitable for model checking of data path circuits. In this pap...
Sa'ed Abed, Otmane Aït Mohamed
FASE
2007
Springer
15 years 8 months ago
Finding Environment Guarantees
Abstract. When model checking a software component, a model of the environment in which that component is supposed to run is constructed. One of the major threats to the validity o...
Marsha Chechik, Mihaela Gheorghiu, Arie Gurfinkel
DIS
2006
Springer
15 years 8 months ago
Symmetric Item Set Mining Based on Zero-Suppressed BDDs
In this paper, we propose a method for discovering hidden information from large-scale item set data based on the symmetry of items. Symmetry is a fundamental concept in the theory...
Shin-ichi Minato
ECLIPSE
2006
ACM
15 years 8 months ago
A toolsuite for the verification of real-time systems in Eclipse
In this work we present an Eclipse plug-in for the VInTiMe (Verifier of INtegrated TImed ModEls)1 suite of tools that combines high-level expressive power, unassisted propertypres...
Lucía Cavatorta, Guido de Caso, André...
FORMATS
2008
Springer
15 years 6 months ago
Some Recent Results in Metric Temporal Logic
Metric Temporal Logic (MTL) is a widely-studied real-time extension of Linear Temporal Logic. In this paper we survey results about the complexity of the satisfiability and model c...
Joël Ouaknine, James Worrell