Timed Concurrent State Machines are an application of Alur’s Timed Automata concept to coincidence-based (rather than interleaving) CSM modeling technique. TCSM support the idea...
Model checking software transactional memories (STMs) is difficult because of the unbounded number, length, and delay of concurrent transactions and the unbounded size of the memo...
Verification techniques like SAT-based bounded model checking have been successfully applied to a variety of system models. Applying bounded model checking to compositional proce...
Jun Sun 0001, Yang Liu 0003, Jin Song Dong, Jing S...
Embedded real-time systems are typically programmed in low-level languages which provide support for event-driven task processing and real-time interrupts. We show that the model c...
The quality of formal specifications and the circuits they are written for can be evaluated through checks such as vacuity and coverage. Both checks involve mutations to the specif...