Sciweavers

433 search results - page 32 / 87
» Activity-driven clock design for low power circuits
Sort
View
MOBISYS
2011
ACM
14 years 4 months ago
Exploiting FM radio data system for adaptive clock calibration in sensor networks
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
Liqun Li, Guoliang Xing, Limin Sun, Wei Huangfu, R...
ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
15 years 7 months ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu
ASPDAC
1999
ACM
80views Hardware» more  ASPDAC 1999»
15 years 6 months ago
Low Power CMOS Off-Chip Drivers with Slew-rate Difference
-- This paper proposes an approach to reduce the short circuit current of CMOS off-chip drivers by individually controlling the input slew rates 10 the P and N channel transistors ...
Rung-Bin Lin, Jinq-Chang Chen
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 8 months ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
14 years 11 months ago
Novel dual-Vth independent-gate FinFET circuits
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
Masoud Rostami, Kartik Mohanram