433 search results - page 34 / 87 » Activity-driven clock design for low power circuits |
118
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DAC
2007
ACM
16 years 2 months ago
2007
ACM
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
108
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DAC
2004
ACM
15 years 7 months ago
2004
ACM
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
100
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ISVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...
110
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NIPS
2003
15 years 3 months ago
2003
We have designed and tested a single-chip analog VLSI sensor that detects imminent collisions by measuring radially expansive optic flow. The design of the chip is based on a mode...
ASPDAC
2006
ACM
15 years 8 months ago
2006
ACM
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...