433 search results - page 35 / 87 » Activity-driven clock design for low power circuits |
138
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CASES
2004
ACM
15 years 7 months ago
2004
ACM
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
GLVLSI
2010
IEEE
15 years 7 months ago
2010
IEEE
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
142
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ISVLSI
2002
IEEE
15 years 6 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
120
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ISLPED
2004
ACM
15 years 7 months ago
2004
ACM
The principle of adiabatic switching in conventional energyrecovery adiabatic circuit is generally explained in literature with the help of the rudimentary RC circuit driven by a ...
112
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GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...