433 search results - page 37 / 87 » Activity-driven clock design for low power circuits |
96
Voted
ATS
1997
IEEE
15 years 6 months ago
1997
IEEE
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
193
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ARVLSI
2001
IEEE
15 years 5 months ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
107
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ISPD
2009
ACM
15 years 8 months ago
2009
ACM
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
ECCTD
2011
14 years 1 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
105
Voted
CORR
2010
Springer
15 years 2 months ago
2010
Springer
The Glottal Source is an important component of voice as it can be considered as the excitation signal to the voice apparatus. Nowadays, new techniques of speech processing such a...