433 search results - page 39 / 87 » Activity-driven clock design for low power circuits |
122
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VLSID
2007
IEEE
15 years 8 months ago
2007
IEEE
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
127
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DAC
2002
ACM
16 years 2 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
114
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DAC
1999
ACM
16 years 2 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
106
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APCCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
118
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ISLPED
1995
ACM
15 years 5 months ago
1995
ACM
The high-frequency oscillator is one of the major causes of both high power consumption and high ElectroMagnetic Interference (EMI) in Embedded Systems (ES). This paper presents a...